Hp DC5850 Manuel d'utilisateur Page 29

  • Télécharger
  • Ajouter à mon manuel
  • Imprimer
  • Page
    / 114
  • Table des matières
  • MARQUE LIVRES
  • Noté. / 5. Basé sur avis des utilisateurs
Vue de la page 28
Technical Reference Guide www.hp.com 3-1
3
Processor/Memory Subsystem
3.1 Introduction
This chapter describes the processor/memory subsystem. This systems support the AMD
Phenom, Athlon, and Sempron processor families. As shown in Figure 3-1, these processors use
an integrated DDR2 memory controller and communicate with the chipset through the
HyperTranport interface (I/F).
Figure 3-1. Processor/Memory Subsystem Architecture
This chapter includes the following topics:
AMD processors (3.2)
Memory subsystem (3.3)
Controller
DDR2
XMM1
Channel A
DIMM
DIMM
DIMM
DIMM
XMM2
XMM4
XMM3
AMD Processor
Channel B
Core(s)
L2 Cache
HyperTransport I/F
North Bridge
Vue de la page 28
1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 113 114

Commentaires sur ces manuels

Pas de commentaire