HP Integrity rx2600 Spécifications télécharger pdf (Page 159)

HP Integrity rx2600 server and HP workstation zx6000 Operation and Maintenance Guide C–159

System Board

Intel Itanium 2 Processor

The Intel Itanium 2 processor provides the following features:

■ Eight-stage pipeline, six general-purpose ALUs, two integer units, one shift unit, four

floating-point units

■ Split L1 cache:

❏ 16 KB, 4-way set associative data cache

❏ 16 KB, 4-way set associative instruction cache

❏ 64 byte line size

■ Unified L2 cache:

❏ 256 KB, 8-way set associative

❏ 128 byte line size

■ Unified L3 cache:

❏ 1.5 MB, 6-way set associative (900 MHz)

❏ 3 MB, 12-way set associative (1 GHz)

❏ 3 MB, 12-way set associative (1.3 GHz)

❏ 6 MB, 24-way set associative (1.5 MHz)

❏ 128 byte line size

Processor Bus

The Intel Itanium 2 processor bus (Front Side Bus, FSB) runs at 200 MHz. Data on the FSB are

transferred at a double data rate, which allows a peak FSB bandwidth of 6.4 GB/sec.

zx1 I/O and Memory Controller

The rx2600 and zx6000 support the following features of the zx1 I/O and memory controller

chip:

■ 3.3 GB/s peak I/O bandwidth through seven concurrent I/O links.

■ Peak memory bandwidth of 8.5 GB/s.

■ Two memory cells, 144 data bits each.

zx1 AGP/PCI Bus Interface

The zx1 AGP/PCI bus interface provides these features:

■ Provides industry standard AGP 1× and 2× support for legacy graphics, and AGP 4× for

current high performance graphics.

■ Provides industry standard PCI 33MHz & 66MHz, PCI-X 66MHz to 133MHz, 32 or 64 data

bit support.

■ Supports AGP fast writes (only to addresses less than 4 GB).

■ Supports 3.3V or Universal keyed PCI cards. 5V keyed PCI cards are not supported.

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HP Integrity rx2600 Spécifications Page 159